Discussion

NEF is one of the most utilized frameworks in neuromorphic computing. It has been utilized to implement a wide range of neuromorphic applications, ranging from robotics to the most comprehensive functional cognitive model . NEF is based on three main pillars: representation of high-dimensional mathematical constructs, the transformation of one representation to another, and the two’s utilization to build dynamical systems. In this work, we propose a fully analog hardware implementation of these three main pillars. Our design comprises the realization of PES, a neuromorphic online learning rule, and the utilization of OZ, a spiking neuron model tailored to the NEF configuration.
Previous designs utilized NEF to implement neuromorphic functional circuits. For example, Intel’s Loihi can be programmed to work with the NEF-based Nengo compiler , realizing, among other features, PES learning . Although Loihi, TrueNorth , and SpiNNaker can be programmed with Nengo, they are digital circuits. NEF was also compiled to work on hybrid neuromorphic designs, such as the NeuroGrid and its later successor, the BrainDrop . The BrainDrop was designed to specifically tailor NEF. In this hybrid circuit, computation is held in analog circuitry, and spike routing is held digitally. Learning in the BrainDrop is realized by digitally solving a least-squares optimization problem. While digital and hybrid neuromorphic designs have proven immensely important for the development of various neuromorphic applications, analog designs have been tremendously successful in vision and sound processing due to their unique tradeoff between performance and energy efficiency . Here, we propose an entirely different approach based on the analog realization of PES learning. Thus, this study provides a full analog neuromorphic implementation of NEF-inspired learning.
Analog components are particularly vulnerable to fabrication variability. There are several techniques to reduce the process variation, for example, adding dummy transistors to pad the operational transistors in the layout stage. Fortunately, heterogeneous neuronal tuning is desirable with NEF, as it provides the variability in activation needed for spanning a representation space. Circuit variability was shown to be essential for adequately spanning a representation space . NEF’s computational approach, therefore, embraces variability. However, we show that relying on process variation alone may require a large number of neurons. We demonstrated that by programming neuron tuning, we could better span a representation space per a given number of neurons. More importantly, even though a postsilicon calibration sequence can be used to compensate for process variation during neuron programming, we show that our learning circuit can inherently compensate for it. Our circuit design can therefore learn to adapt to changes within itself. The next design improvement to be further considered is our naïve control circuit. The control circuit presented herein is limited, as the resistance values governing the neurons’ tuning curves are constant. Therefore, changing the voltages that feed the control circuit uniformly shifts the neurons’ representation characteristics. A more advanced resistance design, via digitally controlled resistors in a hierarchical pattern or via a diffusor (used in the design of the BrainDrop), will enable dynamic nonlinear configurations. The circuit simulation files and the emulator are available in <will be provided upon acceptance>.