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\begin{document}

\title{Optimized recess etching criteria for T-gate fabrication achieving
\emph{f\textsubscript{t}}= 290 GHz at \emph{L\textsubscript{g}}= 124 nm
in metamorphic HEMT with In\textsubscript{0.7}Ga\textsubscript{0.3}As
channel}



\author[1]{Jong Yul Park}%
\author[1]{Byoung-Gue Min}%
\author[1]{Jong-Min Lee}%
\author[1]{Woojin Chang}%
\author[1]{Dong Min Kang}%
\author[1]{E-San Jang}%
\author[1]{Junhyung Kim}%
\author[1]{Jeonggil Kim}%
\affil[1]{Electronics and Telecommunications Research Institute}%


\vspace{-1em}



  
  \date{June 16, 2024}


\begingroup
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\selectlanguage{english}
\begin{abstract}
We propose criteria for recess etching to fabricate T-gate used in
InGaAs HEMTs. By patterning additional rectangular pads on the source
and drain metals in the e-beam lithography step, it is possible to
measure the drain-to-source resistance (\emph{R\textsubscript{ds}}) and
current (\emph{I\textsubscript{ds}}). the ratio (\selectlanguage{greek}Γ\selectlanguage{english}) of before and after
etching for each \emph{R\textsubscript{ds}} and
\emph{I\textsubscript{ds}} can be used as criteria to determine the
point in time to stop etching. By performing recess etching with \selectlanguage{greek}Γ\selectlanguage{english}= 1.97
for \emph{R\textsubscript{ds}} and \selectlanguage{greek}Γ\selectlanguage{english}= 0.38 for
\emph{I\textsubscript{ds}} on an epiwafer having cap doping
concentration of 2= 10\textsuperscript{19} cm\textsuperscript{-3} and
channel indium content of 0.7, we have fabricated InGaAs mHEMT device
showing \emph{g\textsubscript{m,max}}= 1603 mS/mm and
\emph{f\textsubscript{t}}= 290 GHz at \emph{L\textsubscript{g}}= 124 nm.
The criteria presented can be applied to InGaAs HEMTs with various
epitaxial structures.%
\end{abstract}%



\sloppy


\textbf{Optimized recess etching criteria for T-gate fabrication
achieving f\textsubscript{t}= 290 GHz at L\textsubscript{g}= 124 nm in
metamorphic HEMT with In\textsubscript{0.7}Ga\textsubscript{0.3}As
channel}

\textbf{Jong Yul Park\textsuperscript{1}, Byoung-Gue
Min\textsuperscript{1}, Jong-Min Lee\textsuperscript{1}, Woojin
Chang\textsuperscript{1}, Dong Min Kang\textsuperscript{1}, E-San
Jang\textsuperscript{1}, Junhyung Kim\textsuperscript{1}, and Jeonggil
Kim\textsuperscript{1}}

\emph{\textsuperscript{1}Terrestrial and Non-Terrestrial Integrated
Telecommunications Research Laboratory/Electronics and
Telecommunications Research Institute, Yuseong-gu, Daejeon 34129,
Republic of Korea}

Email: jongyulpark@etri.re.kr.

We propose criteria for recess etching to fabricate T-gate used in
InGaAs HEMTs. By patterning additional rectangular pads on the source
and drain metals in the e-beam lithography step, it is possible to
measure the drain-to-source resistance (\emph{R\textsubscript{ds}}) and
current (\emph{I\textsubscript{ds}}). the ratio (\selectlanguage{greek}Γ\selectlanguage{english}) of before and after
etching for each \emph{R\textsubscript{ds}}
and\emph{I\textsubscript{ds}} can be used as criteria to determine the
point in time to stop etching. By performing recess etching with \selectlanguage{greek}Γ\selectlanguage{english}= 1.97
for \emph{R\textsubscript{ds}} and \selectlanguage{greek}Γ\selectlanguage{english}= 0.38 for\emph{I\textsubscript{ds}}
on an epiwafer having cap doping concentration of
2\selectlanguage{ngerman}×10\textsuperscript{19} cm\selectlanguage{english}\textsuperscript{-3} and channel indium
content of 0.7, we have fabricated InGaAs mHEMT device showing
\emph{g\textsubscript{m,max}}= 1603 mS/mm and\emph{f\textsubscript{t}}=
290 GHz at \emph{L\textsubscript{g}}= 124 nm. The criteria presented can
be applied to InGaAs HEMTs with various epitaxial structures.

\emph{Introduction:} Metamorphic high electron mobility transistor
(mHEMT) with InGaAs channel material based on GaAs substrate can be
applied to monolithic microwave integrated circuit (MMIC) with high
frequency {[}1,2{]}. Compared to the competing InP-based InGaAs HEMT
{[}3,4{]}, the mHEMT exhibits relatively lower performance but is more
cost-effective due to cheaper substrate price, the ability to fabricate
on larger wafers, and ease of handling {[}5{]}. Both InP-based HEMT and
GaAs-based mHEMT can have various epitaxial structures, mainly
differentiated by the presence or absence of an InP layer between the
cap and barrier layers. Here the InP layer acts as an etch stop layer
during recess etching process. After finishing recess etching, gate
metal stacks of Pt/Ti/Pt/Au are usually deposited on InP layer {[}6{]}
or InAlAs barrier {[}7{]}. In this case, however, it is essential to
optimize parameters such as the thickness of the bottom Pt layer and Pt
sinking temperature {[}8{]}. On the other hand, not using an InP etch
stop layer can avoid such issues, but there is a risk of etching into
the channel during recess etching process. To solve this problem, it is
necessary to measure the drain-to-source resistance
(\emph{R\textsubscript{ds}} ) and current (\emph{I\textsubscript{ds}} )
before and after etching to find proper time to stop etching process. It
can be done by developing additional recess pads on source and drain
metals, which are coated by e-beam resists. In our previous works, we
dealt with the uneven recess etch rate between fingers in multi-finger
mHEMT {[}9{]} and the etching depth variation according to the foot
width of the T-gate {[}10{]}.

In this paper, we present criteria of performing citric acid-based
electrochemical recess etching before T-gate metal evaporation to
fabricate high-performance InGaAs HEMTs. We describe the fabrication
process from mesa isolation to e-beam lithography for T-gate pattern
formation, followed by the recess etching process. Based on the
measurement results of transconductance (\emph{g\textsubscript{m}} ) and
cut-off frequency (\emph{f\textsubscript{t}} ), we emphasize the
importance of the ratios (\selectlanguage{greek}Γ\selectlanguage{english}) of before and after etching
for\emph{R\textsubscript{ds}} and \emph{I\textsubscript{ds}} , which are
criteria for optimization of recess etching. These criteria can be
applied to InGaAs HEMTs with various epitaxial structures.

\emph{Fabrication process before recess etching:} To fabricate InGaAs
HEMT device, we used 4-inch GaAs substrate and molecular beam epitaxy
(MBE) to grow epitaxial structures as shown in Table 1. First,
metamorphic buffer layer, which was used to offset the lattice mismatch
between GaAs and In\textsubscript{0.52}Al\textsubscript{0.48}As buffer
layer, was grown on semi-insulating GaAs substrate by changing its In
content (\emph{x} ) from \emph{x} = 0 to 0.52. Then,
In\textsubscript{0.7}Ga\textsubscript{0.3}As of 10 nm was formed to be
used as a channel on In\textsubscript{0.52}Al\textsubscript{0.48}As
buffer layer of 300 nm. The carrier density and channel mobility
(\selectlanguage{greek}\emph{µ\textsubscript{ch}}\selectlanguage{english} ) were
2.9\selectlanguage{ngerman}×10\textsuperscript{12}cm\textsuperscript{2} and 10710
cm\textsuperscript{2}/V\selectlanguage{english}[?]s, respectively. Next, Si \selectlanguage{greek}δ-\selectlanguage{english}doping of
6\selectlanguage{ngerman}×10\textsuperscript{12} cm\selectlanguage{english}\textsuperscript{-2} was applied to supply
electrons to the channel upon
In\textsubscript{0.52}Al\textsubscript{0.48}As spacer of 3 nm. Another
Si \selectlanguage{greek}δ-\selectlanguage{english}doping of 5.5\selectlanguage{ngerman}×10\textsuperscript{12} cm\selectlanguage{english}\textsuperscript{-2} was
applied in In\textsubscript{0.52}Al\textsubscript{0.48}As barrier to
enhance conductivity. Finally,
In\textsubscript{0.53}Ga\textsubscript{0.47}As cap layer of 20 nm doped
with Si of 2x10\textsuperscript{19} cm\selectlanguage{english}\textsuperscript{-3} was formed on
In\textsubscript{0.52}Al\textsubscript{0.48}As barrier to fabricate
Ohmic contacts of source and drain electrodes. The epitaxial structure
designed by our research group was produced by IntelliEPI Inc. and its
sheet resistance was 77.8 \selectlanguage{greek}Ω/\selectlanguage{english}sq. By using this 4-inch epiwafer, mesa
isolation was firstly conducted. Each HEMT device were separated by mesa
having thickness of 200 nm, which were etched by solution of
H\textsubscript{3}PO\textsubscript{4}:H\textsubscript{2}O\textsubscript{2}:H\textsubscript{2}O=
1:1:40. As a result of transmission line measurement (TLM) with a gap of
5 \selectlanguage{greek}µ\selectlanguage{english}m between 100\selectlanguage{ngerman}×100 \selectlanguage{greek}µ\selectlanguage{english}m mesa pads, 61 G\selectlanguage{greek}Ω \selectlanguage{english}was measured, and 65 pA was
flowed at 2 V, which confirms that mesa-to-mesa isolation was properly
achieved.

Table 1: Epitaxial structure of InGaAs HEMT.\selectlanguage{english}
\begin{longtable}[]{@{}lllll@{}}
\toprule
\emph{Layer} & \emph{Material} & \emph{THK} & \emph{Level} &
\emph{Type}\tabularnewline
\midrule
\endhead
cap & In\textsubscript{0.53}Ga\textsubscript{0.47}As & 20 nm &
2.0\selectlanguage{ngerman}×10\textsuperscript{19}/cm\textsuperscript{3} & N+\tabularnewline
barrier & In\textsubscript{0.52}Al\textsubscript{0.48}As & 2 nm &
\textbf{-} & i\tabularnewline
1\textsuperscript{st} \selectlanguage{greek}δ-\selectlanguage{english}doping & Si & \textbf{-} &
5.5\selectlanguage{ngerman}×10\textsuperscript{12}/cm\textsuperscript{2} & N\tabularnewline
barrier & In\textsubscript{0.52}Al\textsubscript{0.48}As & 6 nm &
\textbf{-} & i\tabularnewline
2\textsuperscript{nd} \selectlanguage{greek}δ-\selectlanguage{english}doping & Si & \textbf{-} &
6.0\selectlanguage{ngerman}×10\textsuperscript{12}/cm\textsuperscript{2} & N\tabularnewline
spacer & In\textsubscript{0.52}Al\textsubscript{0.48}As & 3 nm &
\textbf{-} & i\tabularnewline
channel & In\textsubscript{0.7}Ga\textsubscript{0.3}As & 10 nm &
\textbf{-} & i\tabularnewline
buffer & In\textsubscript{0.52}Al\textsubscript{0.48}As & 300 nm &
\textbf{-} & i\tabularnewline
m-buffer & GaAs -In\textsubscript{0.52}Al\textsubscript{0.48}As & 300 nm
& \textbf{-} & i\tabularnewline
\bottomrule
\end{longtable}

To fabricate Ohmic contact serving as a source and drain, Mo/Ti/Pt/Au,
each with thickness of 10/30/30/280 nm, was deposited by using e-beam
evaporator. The source-to-drain distance of the device was designed to
be 2 \selectlanguage{greek}µ\selectlanguage{english}m. Also, the device was designed as a two-finger T-gate with a
total gate width of 100 \selectlanguage{greek}µ\selectlanguage{english}m. To measure the resistance of Ohmic contact,
patterns with interval of 5/10/20/40/80 \selectlanguage{greek}µ\selectlanguage{english}m were made. As a result of TLM
measurement, a contact resistance (\emph{R\textsubscript{c}} ) of 0.078
\selectlanguage{greek}Ω\selectlanguage{english}[?]\selectlanguage{english}mm was measured.

After coating PMMA-based tri-layer to make T-gate patterns, e-beam
lithography using Raith EBPG 5000 was performed with 100 nm target for
foot and 600 nm target for head, respectively. In addition, ``anchor''
and ``gate pad'' were added to the end of each T-gate pattern to ensure
structural stability, as shown in Fig. 1a. After finishing to develop
patterns, descum process was performed to remove residues so that the
final foot width became about 120 nm.\selectlanguage{english}
\begin{figure}[H]
\begin{center}
\includegraphics[width=0.70\columnwidth]{figures/image1/image1}

\end{center}
\end{figure}

\emph{a b}

\textbf{Fig. 1} \emph{Top views of design for HEMT device.}

\emph{a} Anchor and gate pad added to the end of two-finger T-gate.

\emph{b} Recess pads for monitoring \emph{R\textsubscript{ds}}
and\emph{I\textsubscript{ds}} during recess etch process.

\emph{Gate recess etching:} Before evaporating T-gate metal stacks,
recess etching for InGaAs and InAlAs makes it possible to improve gate
controllability so that higher \emph{g\textsubscript{m}} is secured. As
shown in Fig. 1b, rectangular pads were additionally exposed on the
source and drain metals in the e-beam lithography step {[}9,10{]}. These
``recess pads'' should have a size enough to contact probe tips. By
using developed recess pads, it is possible to
monitor\emph{R\textsubscript{ds}} and \emph{I\textsubscript{ds}} for
biased drain voltage (\emph{V\textsubscript{D}} ). Accordingly, it is
feasible to find optimal point in time to stop etch and keep from
etching of 2\textsuperscript{nd} Si \selectlanguage{greek}δ-\selectlanguage{english}doping layer on the
In\textsubscript{0.52}Al\textsubscript{0.48}As spacer. Also, by using
citric acid-based etchant, InGaAs/InAlAs layers can be electrochemically
etched because potential difference occurs between InGaAs/InAlAs layer
opened by foot pattern and Ohmic metal opened by recess pad. In the same
way as our previous paper {[}10{]}, an etchant comprising citric acid
(10 g), hydrogen peroxide (1 ml), and water (430 ml) was used and
maintained its temperature at 32 C\selectlanguage{ngerman}°.

To find an appropriate point in time to stop etching, we compared the
experimental results for two different epitaxial structures, which have
the same thickness of In\textsubscript{0.53}Ga\textsubscript{0.47}As cap
and In\textsubscript{0.52}Al\textsubscript{0.48}As barrier/spacer, but
differ in cap doping concentration (\emph{N\textsubscript{cap}} ), the
number of Si \selectlanguage{greek}δ-\selectlanguage{english}doping layers, and In content of channel. Figure 2 shows
the \emph{R\textsubscript{ds}} at \emph{V\textsubscript{d}} = 0 V and
the\emph{I\textsubscript{ds}} at \emph{V\textsubscript{d}} = 1 V for
these two epitaxial structures. Comparing \emph{R\textsubscript{ds}}
and\emph{I\textsubscript{ds}} before etching
for\emph{N\textsubscript{cap}} =
1\selectlanguage{ngerman}×10\textsuperscript{19}cm\selectlanguage{english}\textsuperscript{-3} (dash-dotted line,
{[}10{]}) and\emph{N\textsubscript{cap}} =
2x10\textsuperscript{19}cm\selectlanguage{english}\textsuperscript{-3} (solid line, this work),
high\emph{N\textsubscript{cap}} reduces \emph{R\textsubscript{ds}} and
increases \emph{I\textsubscript{ds}} . The
\emph{R\textsubscript{ds}}gradually increases as the thickness of the
cap layer decreases by recess etching. Even if the cap layer is
completely etched and InAlAs barrier is revealed,
\emph{R\textsubscript{ds}} does not change abruptly and keep gradually
increasing because Si \selectlanguage{greek}δ-\selectlanguage{english}doping layers supply electrons to form current
path.

In the previous work, we stopped to etch when\emph{R\textsubscript{ds}}
= 18.7 \selectlanguage{greek}Ω \selectlanguage{english}and \emph{I\textsubscript{ds}} = 31.3 mA were measured, and the
resultant device showed good performance {[}10{]}. Here the ratios (\selectlanguage{greek}Γ\selectlanguage{english})
of before and after etching for each\emph{R\textsubscript{ds}} and
\emph{I\textsubscript{ds}} can be defined in equations as follows:

, , (1)

where \emph{i} = 0,1,2\ldots{},\emph{n} is integer and \emph{n} means
the number of times etching has been performed. In the case of previous
work, \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{R}} = 1.82 and \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{I}} =
0.39. Referring to these ratios, in this work, etching was stopped
when\emph{R\textsubscript{ds}} = 13 \selectlanguage{greek}Ω \selectlanguage{english}and \emph{I\textsubscript{ds}} =
34.7 mA so that \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{R}} = 1.97 and
\selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{I}} = 0.38. Here, the \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{R}}
was adjusted slightly higher and the \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{I}} was
adjusted slightly lower, taking into consideration the additional
1\textsuperscript{st} Si \selectlanguage{greek}δ-\selectlanguage{english}doping layer and 0.7 of channel In content.
Additionally, for another wafer with the same epitaxial structure as
this work, more etching was carried out, resulting in a rapid change of
\emph{R\textsubscript{ds}} = 21.1 \selectlanguage{greek}Ω \selectlanguage{english}and \emph{I\textsubscript{ds}} =24.3
mA (dotted line) so that \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{R}} = 3.34 and
\selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{I}} = 0.26, which can be assumed to indicate
etching down to the 2\textsuperscript{nd} Si \selectlanguage{greek}δ-\selectlanguage{english}doping layer. This led to
a poor device operation of \emph{I\textsubscript{on}} \textasciitilde{}
10mA at\emph{V\textsubscript{d}} =0.8 V and\emph{g\textsubscript{m}}
\textasciitilde{} 200 mS/mm.\selectlanguage{english}
\begin{figure}[H]
\begin{center}
\includegraphics[width=0.70\columnwidth]{figures/image4/image4}

\end{center}
\end{figure}

\emph{a b}

\textbf{Fig. 2} \selectlanguage{ngerman}\emph{Measurement results of R\textsubscript{ds} and
I\textsubscript{ds} for mHEMTs having cap layer of N\textsubscript{cap}=
1×10\textsuperscript{19} cm\textsuperscript{-3} and
N\textsubscript{cap}= 2x10\textsuperscript{19}
cm\textsuperscript{-3}before and after recess etching process.}\selectlanguage{english}

\emph{a R\textsubscript{ds}} when biasing \emph{V\textsubscript{d}} = 0
V.

\emph{b I\textsubscript{ds}} when biasing \emph{V\textsubscript{d}} = 1
V.

Following the etching process, the gate stack of Ti/Au= 40/400 nm were
evaporated. After finishing lift-off process, SiN of 50 nm was deposited
by PECVD for passivation. Figure 3 shows the results of transmission
electron microscopy (TEM) using Tecnai F30 S-Twin after completing
T-gate fabrication. The final gate length (i.e., gate foot width) is
evaluated as about 124 nm (see Fig. 3a), which is similar to the length
examined by CDSEM after descum. By magnifying TEM to make the epitaxial
structures more visible, it can be observed that
In\textsubscript{0.7}Ga\textsubscript{0.3}As channel on
In\textsubscript{0.52}Al\textsubscript{0.48}As buffer has thickness of
10 nm, as designed (see Fig. 3b). Above the channel, it is noticeable
that the thickness of In\textsubscript{0.52}Al\textsubscript{0.48}As
remaining after recess etching is about 7.7 nm. This means that the
T-gate was deposited on 4.7 nm from the 2\textsuperscript{nd} Si
\selectlanguage{greek}δ-\selectlanguage{english}doping layer, so it can be evaluated that the recess etching was
properly performed to suppress the occurrence of gate leakage current.\selectlanguage{english}
\begin{figure}[H]
\begin{center}
\includegraphics[width=0.70\columnwidth]{figures/image5/image5}

\end{center}
\end{figure}

\emph{a b}

\textbf{Fig. 3}

\emph{Cross-sectional TEM images.}

\emph{a} T-gate foot deposited on recessed
In\textsubscript{0.52}Al\textsubscript{0.48}As layer.

\emph{b} Magnified TEM image showing epitaxial structures below T-gate
foot.

\emph{Electrical characteristics:} Figure 4 illustrates the device
performances by measuring with Keysight HP4142 and Cascade on-wafer
probe station. During the measurement, the biased drain voltage
(\emph{V\textsubscript{d}} ) was fixed at 0.8 V. As shown in Fig. 4a,
when gate voltage (\emph{V\textsubscript{g}} ) was biased at -1 V, drain
current (\emph{I\textsubscript{d}} ) was measured at 1.6 \selectlanguage{greek}µ\selectlanguage{english}A/mm. When
biasing \emph{V\textsubscript{g}} = 0.2 V, the
\emph{I\textsubscript{d}}was measured at 664.7 mA/mm. From the
measurement results, the threshold voltage (\emph{V\textsubscript{th}} )
and maximum transconductance (\emph{g\textsubscript{m,max}} ) of -0.47 V
and 1603 mS/mm were extracted, respectively. Subsequently, the
S-parameter for the frequency range of 0.5-50 GHz was measured using a
Keysight N5245A microwave network analyzer while
\emph{V\textsubscript{g}} = 0 V and\emph{V\textsubscript{d}} = 0.8 V
were applied to the same device. The result of calculating the current
gain of \emph{h\textsubscript{21}} was shown in Fig. 4b. By
extrapolating with a line of -20 dB/decade, 290 GHz of
\emph{f\textsubscript{t}} was extracted.\selectlanguage{english}
\begin{figure}[H]
\begin{center}
\includegraphics[width=0.70\columnwidth]{figures/image6/image6}

\end{center}
\end{figure}

\emph{a b}

\textbf{Fig. 4} \emph{Electrical characteristics of mHEMT.}

\emph{a} Measured \emph{V\textsubscript{g}-I\textsubscript{ds}} plot and
extracted \emph{g\textsubscript{m}} curve at \emph{V\textsubscript{d}} =
0.8 V.

\emph{b} Calculated \emph{h\textsubscript{21}} and extrapolated line to
find \emph{f\textsubscript{t}.}

Figure 5 describes comparison between these results
(\emph{f\textsubscript{t}} and \emph{g\textsubscript{m, max}} ) and the
other values reported by various research groups. All references dealt
with mHEMTs for channel In \emph{x} range from 0.6 to 0.8. Firstly, we
obtained higher cut-off frequency of 290 GHz at longer gate length of
124 nm compared to the results of our previous work
(\emph{f\textsubscript{t}} = 210 GHz at \emph{L\textsubscript{g}} = 100
nm, {[}2{]}). Considering that recess etching was carried out properly
for both devices, the one of the main reasons for the difference in
performance is epitaxial structure changed its channel In content from
0.6 to 0.7 and \emph{N\textsubscript{cap}}
from\emph{N\textsubscript{cap}} =
1\selectlanguage{ngerman}×10\textsuperscript{19}cm\selectlanguage{english}\textsuperscript{-3} to
\emph{N\textsubscript{cap}} = 2x10\textsuperscript{19}
cm\selectlanguage{english}\textsuperscript{-3}.

Next, in comparison with the results from other research groups,
the\emph{f\textsubscript{t}} = 290 GHz obtained in this paper is higher
than that of devices with \emph{L\textsubscript{g}} = 100 nm {[}11{]}
and\emph{L\textsubscript{g}} = 80 nm {[}7{]}, which
have\emph{f\textsubscript{t}} values of 220 GHz and 246 GHz,
respectively. Also, the \emph{f\textsubscript{t}} performance in this
paper is comparable to the device reporting \emph{f\textsubscript{t}} =
293 GHz at\emph{L\textsubscript{g}} = 70 nm {[}12{]}. To analyse the
reasons, it is necessary to perform a detailed analysis for each case
because different epitaxial structures or device designs were used by
each research group. However, a simple overview of all cases reveals
that, as shown in Fig. 5b, our result shows relatively high
\emph{g\textsubscript{m,max}} = 1603 mS/mm, which leads to the high
\emph{f\textsubscript{t}} value according to the equation of
\emph{f\textsubscript{t}} =\emph{g\textsubscript{m}}
/2\selectlanguage{greek}π\selectlanguage{english}(\emph{C\textsubscript{gs}} +\emph{C\textsubscript{gd}} ). Hence, it
can be evaluated that the optimal recess etching performed in this study
led to a sufficient \emph{g\textsubscript{m}} potentially achievable by
the device design and epitaxial structure.\selectlanguage{english}
\begin{figure}[H]
\begin{center}
\includegraphics[width=0.70\columnwidth]{figures/image7/image7}

\end{center}
\end{figure}

\emph{a b}

\textbf{Fig. 5} \emph{Comparison our results in this paper with other
reported values for mHEMTs with In x range of 0.6-0.8.}

\emph{a L\textsubscript{g}-f\textsubscript{t}} plot for results
comparison.

\emph{b L\textsubscript{g}-g\textsubscript{m,max}} plot for results
comparison.

\emph{Conclusion:} We have demonstrated the recess etching technique for
T-gate fabrication in InGaAs mHEMTs. By opening additional recess pads
on the source and drain metals, it is possible to find the optimal point
in time to stop etching by measuring \emph{R\textsubscript{ds}}
and\emph{I\textsubscript{ds}} . Specifically, by referring the criteria
of \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{R}} = 1.82 and \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{I}} = 0.39
for epiwafer having \emph{N\textsubscript{cap}} =
1\selectlanguage{ngerman}×10\textsuperscript{19}cm\selectlanguage{english}\textsuperscript{-3} and channel In \emph{x} =
0.6, we have adjusted the criteria and performed recess etching to be
\selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{R}} = 1.97 and \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{I}} = 0.38
for epiwafer having \emph{N\textsubscript{cap}} =
2\selectlanguage{ngerman}×10\textsuperscript{19}cm\selectlanguage{english}\textsuperscript{-3} and channel In \emph{x} =
0.7. As a result, we have fabricated mHEMT device showing
\emph{g\textsubscript{m,max}} = 1603 mS/mm and \emph{f\textsubscript{t}}
= 290 GHz at\emph{L\textsubscript{g}} = 124 nm. Even with different
epitaxial structures, referring to the criteria of
\selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{R}} and \selectlanguage{greek}Γ\selectlanguage{english}\emph{\textsubscript{I}} ratios presented
in this paper would be helpful to find the appropriate timing to stop
recess etching for successful fabrication of InGaAs HEMTs.

\emph{Acknowledgments:} This research was financially supported by the
Institute of Civil Military Technology Cooperation funded by the Defence
Acquisition Program Administration and Ministry of Trade, Industry and
Energy of Korean government under grant No. 22-CM-TN-15.

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